move similar components into new hal module
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52
\
Normal file
52
\
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@ -0,0 +1,52 @@
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use crate::hal::arch::riscv::{asm, MIE_MTIE, MSTATUS_MIE};
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use crate::NCPU;
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use core::ptr::addr_of;
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// Core Local Interrupter (CLINT), which contains the timer.
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pub const CLINT: usize = 0x2000000;
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const CLINT_MTIME: usize = CLINT + 0xbff8;
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extern "C" {
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pub fn timervec();
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}
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#[no_mangle]
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pub static mut timer_scratch: [[u64; 5]; NCPU] = [[0u64; 5]; NCPU];
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fn clint_mtimecmp(hartid: usize) -> *mut u64 {
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(CLINT + 0x4000 + (8 * hartid)) as *mut u64
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}
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/// Arrange to receive timer interrupts.
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///
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/// They will arrive in machine mode at
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/// at timervec in kernelvec.S,
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/// which turns them into software interrupts for
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/// devintr() in trap.c.
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pub unsafe fn timerinit() {
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// Each CPU has a separate source of timer interrupts.
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let id = asm::r_mhartid() as usize;
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// Ask the CLINT for a timer interrupt.
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// cycles, about 1/10th second in qemu
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let interval = 1_000_000u64;
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*clint_mtimecmp(id) = *(CLINT_MTIME as *const u64) + interval;
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// Prepare information in scratch[] for timervec.
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// scratch[0..=2]: Space for timervec to save registers.
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// scratch[3]: Address of CLINT MTIMECMP register.
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// scratch[4]: Desired interval (in cycles) between timer interrupts.
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let scratch: &mut [u64; 5] = &mut timer_scratch[id];
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scratch[3] = clint_mtimecmp(id) as usize as u64;
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scratch[4] = interval;
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asm::w_mscratch(addr_of!(scratch[0]) as usize as u64);
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// Set the machine-mode trap handler.
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asm::w_mtvec(timervec as usize as u64);
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// Enable machine-mode interrupts.
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asm::w_mstatus(asm::r_mstatus() | MSTATUS_MIE);
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// Enable machine-mode timer interrupts.
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asm::w_mie(asm::r_mie() | MIE_MTIE);
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}
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@ -10,5 +10,10 @@ license = "LGPL-3.0-only"
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[dependencies]
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arrayvec = { version = "0.7.4", default-features = false }
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[features]
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default = ["qemu-riscv64"]
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qemu-riscv64 = []
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milk-v = []
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[lib]
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crate-type = ["staticlib"]
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@ -1,3 +0,0 @@
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// Virtio MMIO interface
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pub const VIRTIO0: usize = 0x10001000;
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pub const VIRTIO0_IRQ: usize = 1;
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@ -1,8 +0,0 @@
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/// QEMU test interface. Used for power off and on.
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pub const QEMU_POWER: usize = 0x100000;
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pub unsafe fn shutdown() -> ! {
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let qemu_power = QEMU_POWER as *mut u32;
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qemu_power.write_volatile(0x5555u32);
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unreachable!();
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}
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@ -11,9 +11,9 @@
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pub mod printf;
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use crate::{
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arch::virtual_memory::{either_copyin, either_copyout},
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fs::file::{devsw, CONSOLE},
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hardware::uart::BufferedUart,
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hal::arch::virtual_memory::{either_copyin, either_copyout},
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hal::hardware::uart::BufferedUart,
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proc::{
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process::{procdump, Process},
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scheduler::wakeup,
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@ -22,7 +22,7 @@ use crate::{
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};
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use core::ptr::addr_of_mut;
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pub static UART0: &BufferedUart = &crate::hardware::UARTS[0].1;
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pub static UART0: &BufferedUart = &crate::hal::platform::UARTS[0].1;
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pub const BACKSPACE: u8 = 0x00;
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pub const INPUT_BUF_SIZE: usize = 128;
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@ -2,8 +2,8 @@
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use super::inode::{iput, readi, stati, writei, Inode, InodeLockGuard};
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use crate::{
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arch::virtual_memory::copyout,
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fs::{log, stat::Stat},
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hal::arch::virtual_memory::copyout,
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io::pipe::Pipe,
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proc::process::Process,
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sync::mutex::Mutex,
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@ -1,7 +1,5 @@
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#[cfg(target_arch = "riscv64")]
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mod riscv;
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#[cfg(target_arch = "riscv64")]
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pub use riscv::hardware;
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pub mod riscv;
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pub mod trap;
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@ -12,12 +10,12 @@ pub mod cpu {
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pub mod interrupt {
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#[cfg(target_arch = "riscv64")]
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pub use super::riscv::{
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asm::{
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pub use crate::hal::{
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arch::riscv::asm::{
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intr_get as interrupts_enabled, intr_off as disable_interrupts,
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intr_on as enable_interrupts,
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},
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plic::{
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hardware::riscv::plic::{
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plic_claim as handle_interrupt, plic_complete as complete_interrupt, plicinit as init,
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plicinithart as inithart,
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},
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@ -29,8 +27,7 @@ pub mod mem {
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pub use super::riscv::{
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asm::sfence_vma as flush_cached_pages,
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mem::{
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kstack, Pagetable, PagetableEntry, KERNEL_BASE, PAGE_SIZE, PHYSICAL_END, PTE_R, PTE_U,
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PTE_V, PTE_W, PTE_X, TRAMPOLINE, TRAPFRAME, VIRTUAL_MAX,
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kstack, Pagetable, PAGE_SIZE, PHYSICAL_END, PTE_R, PTE_W, PTE_X, TRAMPOLINE, TRAPFRAME,
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},
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};
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@ -52,11 +49,6 @@ pub mod virtual_memory {
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};
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}
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pub mod power {
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#[cfg(target_arch = "riscv64")]
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pub use super::riscv::power::shutdown;
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}
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pub mod clock {
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#[cfg(target_arch = "riscv64")]
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pub use super::riscv::trap::CLOCK_TICKS;
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@ -1,10 +1,6 @@
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pub mod asm;
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pub mod clint;
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pub mod cpu;
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pub mod hardware;
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pub mod mem;
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pub mod plic;
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pub mod power;
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pub mod start;
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pub mod trap;
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pub mod virtual_memory;
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@ -1,5 +1,10 @@
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use super::{asm, clint, MSTATUS_MPP_MASK, MSTATUS_MPP_S, SIE_SEIE, SIE_SSIE, SIE_STIE};
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use crate::{main, NCPU};
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use crate::{
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hal::{
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arch::riscv::{asm, MSTATUS_MPP_MASK, MSTATUS_MPP_S, SIE_SEIE, SIE_SSIE, SIE_STIE},
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hardware::riscv::clint,
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},
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main, NCPU,
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};
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use core::arch::asm;
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#[no_mangle]
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use super::{asm, mem::make_satp, SSTATUS_SPIE, SSTATUS_SPP};
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use crate::{
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arch::{
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hardware::VIRTIO0_IRQ,
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interrupt,
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mem::{PAGE_SIZE, TRAMPOLINE},
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hal::{
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arch::{
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interrupt,
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mem::{PAGE_SIZE, TRAMPOLINE},
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},
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platform::VIRTIO0_IRQ,
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},
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println,
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proc::{
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@ -57,7 +59,7 @@ pub unsafe fn devintr() -> i32 {
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let irq = interrupt::handle_interrupt();
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let mut uart_interrupt = false;
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for (uart_irq, uart) in &crate::hardware::UARTS {
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for (uart_irq, uart) in &crate::hal::platform::UARTS {
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if irq == *uart_irq {
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uart_interrupt = true;
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uart.interrupt();
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@ -1,17 +1,16 @@
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use super::{
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asm,
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mem::{kstack, make_satp, pte2pa},
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plic::PLIC,
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power::QEMU_POWER,
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};
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use crate::{
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arch::{
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self,
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hardware::VIRTIO0,
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mem::{
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round_down_page, round_up_page, Pagetable, PagetableEntry, KERNEL_BASE, PAGE_SIZE,
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PHYSICAL_END, PTE_R, PTE_U, PTE_V, PTE_W, PTE_X, TRAMPOLINE, VIRTUAL_MAX,
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hal::{
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arch::{
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mem::{flush_cached_pages, round_down_page, round_up_page},
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riscv::{
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asm,
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mem::{
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kstack, make_satp, pte2pa, Pagetable, PagetableEntry, KERNEL_BASE, PAGE_SIZE,
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PHYSICAL_END, PTE_R, PTE_U, PTE_V, PTE_W, PTE_X, TRAMPOLINE, VIRTUAL_MAX,
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},
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},
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},
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hardware::riscv::plic::PLIC,
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},
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mem::{
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kalloc::{kalloc, kfree},
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@ -42,11 +41,12 @@ pub unsafe fn kvmmake() -> Pagetable {
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}
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memset(pagetable.cast(), 0, PAGE_SIZE);
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// QEMU test interface used for power management.
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kvmmap(pagetable, QEMU_POWER, QEMU_POWER, PAGE_SIZE, PTE_R | PTE_W);
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for page in &crate::hal::platform::DIRECT_MAPPED_PAGES {
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kvmmap(pagetable, *page, *page, PAGE_SIZE, PTE_R | PTE_W);
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}
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// UART registers
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for (_, uart) in &crate::hardware::UARTS {
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for (_, uart) in &crate::hal::platform::UARTS {
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kvmmap(
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pagetable,
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uart.base_address,
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@ -56,8 +56,16 @@ pub unsafe fn kvmmake() -> Pagetable {
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);
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}
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// VirtIO MMIO disk interface
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kvmmap(pagetable, VIRTIO0, VIRTIO0, PAGE_SIZE, PTE_R | PTE_W);
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// VirtIO MMIO disk interfaces
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for (_, virtio_disk_addr) in &crate::hal::platform::VIRTIO_DISKS {
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kvmmap(
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pagetable,
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*virtio_disk_addr,
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*virtio_disk_addr,
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PAGE_SIZE,
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PTE_R | PTE_W,
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);
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}
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// PLIC
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kvmmap(pagetable, PLIC, PLIC, 0x400000, PTE_R | PTE_W);
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@ -119,12 +127,12 @@ pub unsafe fn kvminit() {
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/// Switch hardware pagetable register to the kernel's pagetable and enable paging.
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pub unsafe fn kvminithart() {
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// Wait for any previous writes to the pagetable memory to finish.
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arch::mem::flush_cached_pages();
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flush_cached_pages();
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asm::w_satp(make_satp(KERNEL_PAGETABLE));
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// Flush stale entries from the TLB.
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arch::mem::flush_cached_pages();
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flush_cached_pages();
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}
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/// Return the address of the PTE in pagetable
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8
kernel/rustkernel/src/hal/hardware/mod.rs
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8
kernel/rustkernel/src/hal/hardware/mod.rs
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@ -0,0 +1,8 @@
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//! Device drivers and hardware implementations.
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pub mod ramdisk;
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pub mod uart;
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pub mod virtio_disk;
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#[cfg(target_arch = "riscv64")]
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pub mod riscv;
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@ -1,8 +1,11 @@
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use super::{asm, MIE_MTIE, MSTATUS_MIE};
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use crate::NCPU;
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use crate::{
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hal::arch::riscv::{asm, MIE_MTIE, MSTATUS_MIE},
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NCPU,
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};
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use core::ptr::addr_of;
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// Core Local Interrupter (CLINT), which contains the timer.
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// I'm pretty sure the CLINT address is standardized to this location.
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pub const CLINT: usize = 0x2000000;
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const CLINT_MTIME: usize = CLINT + 0xbff8;
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2
kernel/rustkernel/src/hal/hardware/riscv/mod.rs
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2
kernel/rustkernel/src/hal/hardware/riscv/mod.rs
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@ -0,0 +1,2 @@
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pub mod clint;
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pub mod plic;
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@ -1,13 +1,15 @@
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//! The RISC-V Platform Level Interrupt Controller (PLIC)
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use super::hardware::VIRTIO0_IRQ;
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use crate::hal::platform::VIRTIO0_IRQ;
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use crate::proc::cpu::Cpu;
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// QEMU puts platform-level interrupt controller (PLIC) here.
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pub const PLIC: usize = 0x0c000000;
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// (VIRTIO0_IRQ, VIRTIO0_IRQ_ADDR)
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const VIRTIO0_IRQ_ADDR: usize = PLIC + VIRTIO0_IRQ * 4;
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pub use crate::hal::platform::PLIC_BASE_ADDR as PLIC;
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use crate::uprintln;
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const PLIC_PRIORITY: usize = PLIC;
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const PLIC_PENDING: usize = PLIC + 0x1000;
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const VIRTIO0_IRQ_ADDR: usize = PLIC + VIRTIO0_IRQ * 4;
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/// Get a pointer to the CPU-specific machine-mode enable register.
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fn plic_menable(hartid: usize) -> *mut u32 {
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@ -36,10 +38,12 @@ fn plic_sclaim(hartid: usize) -> *mut u32 {
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pub unsafe fn plicinit() {
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// Set desired IRQ priorities non-zero (otherwise disabled).
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for (uart_irq, _) in &crate::hardware::UARTS {
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for (uart_irq, _) in &crate::hal::platform::UARTS {
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*((PLIC + uart_irq * 4) as *mut u32) = 1;
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}
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*(VIRTIO0_IRQ_ADDR as *mut u32) = 1;
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for (virtio_disk_irq, _) in &crate::hal::platform::VIRTIO_DISKS {
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*((PLIC + virtio_disk_irq * 4) as *mut u32) = 1;
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}
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}
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pub unsafe fn plicinithart() {
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@ -48,9 +52,12 @@ pub unsafe fn plicinithart() {
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// Set enable bits for this hart's S-mode
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// for the UART and VIRTIO disk.
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let mut enable_bits = 0;
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for (uart_irq, _) in &crate::hardware::UARTS {
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for (uart_irq, _) in &crate::hal::platform::UARTS {
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enable_bits |= 1 << uart_irq;
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}
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// for (virtio_disk_irq, _) in &crate::hal::platform::VIRTIO_DISKS {
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// enable_bits |= 1 << virtio_disk_irq;
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// }
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enable_bits |= 1 << VIRTIO0_IRQ;
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*plic_senable(hart) = enable_bits;
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@ -2,8 +2,8 @@
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#![allow(non_upper_case_globals)]
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use crate::{
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arch::trap::InterruptBlocker,
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console::consoleintr,
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hal::arch::trap::InterruptBlocker,
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proc::scheduler::wakeup,
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queue::Queue,
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sync::mutex::{Mutex, MutexGuard},
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3
kernel/rustkernel/src/hal/mod.rs
Normal file
3
kernel/rustkernel/src/hal/mod.rs
Normal file
@ -0,0 +1,3 @@
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pub mod arch;
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pub mod hardware;
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pub mod platform;
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1
kernel/rustkernel/src/hal/platform/milk_v.rs
Normal file
1
kernel/rustkernel/src/hal/platform/milk_v.rs
Normal file
@ -0,0 +1 @@
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// TODO
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11
kernel/rustkernel/src/hal/platform/mod.rs
Normal file
11
kernel/rustkernel/src/hal/platform/mod.rs
Normal file
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#[cfg(feature = "milk-v")]
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mod milk_v;
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#[cfg(feature = "milk-v")]
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pub use milk_v::*;
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#[cfg(feature = "qemu-riscv64")]
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mod qemu_riscv64;
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#[cfg(feature = "qemu-riscv64")]
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pub use qemu_riscv64::*;
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#[cfg(not(any(feature = "milk-v", feature = "qemu-riscv64")))]
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compile_error!("a platform must be selected");
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23
kernel/rustkernel/src/hal/platform/qemu_riscv64.rs
Normal file
23
kernel/rustkernel/src/hal/platform/qemu_riscv64.rs
Normal file
@ -0,0 +1,23 @@
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use crate::hal::hardware::uart::BufferedUart;
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pub static DIRECT_MAPPED_PAGES: [usize; 1] = [QEMU_POWER];
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// Devices: (IRQ, driver)
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pub static UARTS: [(usize, BufferedUart); 1] = [(10, BufferedUart::new(0x1000_0000))];
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pub static VIRTIO_DISKS: [(usize, usize); 1] = [(1, 0x10001000)];
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// Virtio MMIO interface
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pub const VIRTIO0: usize = 0x10001000;
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pub const VIRTIO0_IRQ: usize = 1;
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// Platform Interrupt Controller location
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pub const PLIC_BASE_ADDR: usize = 0x0c000000;
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/// QEMU test interface. Used for power off and on.
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const QEMU_POWER: usize = 0x100000;
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pub unsafe fn shutdown() -> ! {
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let qemu_power = QEMU_POWER as *mut u32;
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qemu_power.write_volatile(0x5555u32);
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unreachable!();
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}
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@ -1,9 +0,0 @@
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//! Device drivers and hardware implementations.
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pub mod ramdisk;
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pub mod uart;
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pub mod virtio_disk;
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use uart::BufferedUart;
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pub static UARTS: [(usize, BufferedUart); 1] = [(10, BufferedUart::new(0x1000_0000))];
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@ -1,6 +1,6 @@
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use crate::{
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arch::virtual_memory::{copyin, copyout},
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fs::file::{filealloc, fileclose, File, FileType},
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hal::arch::virtual_memory::{copyin, copyout},
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mem::kalloc::{kalloc, kfree},
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proc::{process::Process, scheduler::wakeup},
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sync::spinlock::Spinlock,
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||||
|
@ -9,10 +9,10 @@
|
||||
extern crate alloc;
|
||||
extern crate core;
|
||||
|
||||
mod arch;
|
||||
mod hal;
|
||||
|
||||
mod console;
|
||||
mod fs;
|
||||
mod hardware;
|
||||
mod io;
|
||||
mod mem;
|
||||
mod proc;
|
||||
@ -64,24 +64,24 @@ pub unsafe fn main() -> ! {
|
||||
console::consoleinit();
|
||||
mem::kalloc::kinit();
|
||||
println!("\nxv6 kernel is booting");
|
||||
arch::virtual_memory::init();
|
||||
arch::virtual_memory::inithart();
|
||||
hal::arch::virtual_memory::init();
|
||||
hal::arch::virtual_memory::inithart();
|
||||
proc::process::procinit();
|
||||
arch::trap::inithart();
|
||||
arch::interrupt::init();
|
||||
arch::interrupt::inithart();
|
||||
hal::arch::trap::inithart();
|
||||
hal::arch::interrupt::init();
|
||||
hal::arch::interrupt::inithart();
|
||||
io::bio::binit();
|
||||
fs::inode::iinit();
|
||||
hardware::virtio_disk::virtio_disk_init();
|
||||
hal::hardware::virtio_disk::virtio_disk_init();
|
||||
proc::process::userinit();
|
||||
STARTED = true;
|
||||
} else {
|
||||
while !STARTED {
|
||||
core::hint::spin_loop();
|
||||
}
|
||||
arch::virtual_memory::inithart();
|
||||
arch::trap::inithart();
|
||||
arch::interrupt::inithart();
|
||||
hal::arch::virtual_memory::inithart();
|
||||
hal::arch::trap::inithart();
|
||||
hal::arch::interrupt::inithart();
|
||||
}
|
||||
proc::scheduler::scheduler();
|
||||
}
|
||||
|
@ -3,7 +3,7 @@
|
||||
//! and pipe buffers. Allocates whole 4096-byte pages.
|
||||
|
||||
use crate::{
|
||||
arch::mem::{round_up_page, PAGE_SIZE, PHYSICAL_END},
|
||||
hal::arch::mem::{round_up_page, PAGE_SIZE, PHYSICAL_END},
|
||||
mem::memset,
|
||||
sync::spinlock::Spinlock,
|
||||
};
|
||||
|
@ -28,7 +28,7 @@ impl Cpu {
|
||||
/// to prevent race with process being moved
|
||||
/// to a different CPU.
|
||||
pub fn current_id() -> usize {
|
||||
crate::arch::cpu::cpu_id()
|
||||
crate::hal::arch::cpu::cpu_id()
|
||||
}
|
||||
/// Return this CPU's cpu struct.
|
||||
/// Interrupts must be disabled.
|
||||
|
@ -7,14 +7,6 @@ use super::{
|
||||
trapframe::Trapframe,
|
||||
};
|
||||
use crate::{
|
||||
arch::{
|
||||
mem::{kstack, Pagetable, PAGE_SIZE, PTE_R, PTE_W, PTE_X, TRAMPOLINE, TRAPFRAME},
|
||||
trap::{usertrapret, InterruptBlocker},
|
||||
virtual_memory::{
|
||||
copyout, mappages, uvmalloc, uvmcopy, uvmcreate, uvmdealloc, uvmfirst, uvmfree,
|
||||
uvmunmap,
|
||||
},
|
||||
},
|
||||
fs::{
|
||||
file::{fileclose, filedup, File},
|
||||
fsinit,
|
||||
@ -22,6 +14,14 @@ use crate::{
|
||||
log::LogOperation,
|
||||
FS_INITIALIZED,
|
||||
},
|
||||
hal::arch::{
|
||||
mem::{kstack, Pagetable, PAGE_SIZE, PTE_R, PTE_W, PTE_X, TRAMPOLINE, TRAPFRAME},
|
||||
trap::{usertrapret, InterruptBlocker},
|
||||
virtual_memory::{
|
||||
copyout, mappages, uvmalloc, uvmcopy, uvmcreate, uvmdealloc, uvmfirst, uvmfree,
|
||||
uvmunmap,
|
||||
},
|
||||
},
|
||||
mem::{
|
||||
kalloc::{kalloc, kfree},
|
||||
memset,
|
||||
|
@ -4,8 +4,8 @@ use super::{
|
||||
process::{Process, ProcessState, PROCESSES},
|
||||
};
|
||||
use crate::{
|
||||
arch,
|
||||
console::printf::println,
|
||||
hal::arch,
|
||||
sync::spinlock::{Spinlock, SpinlockGuard},
|
||||
};
|
||||
use core::{
|
||||
|
@ -29,7 +29,7 @@ impl Lock {
|
||||
|
||||
match lock_strategy {
|
||||
LockStrategy::Spin => {
|
||||
crate::arch::trap::push_intr_off();
|
||||
crate::hal::arch::trap::push_intr_off();
|
||||
|
||||
while self.locked.swap(true, Ordering::Acquire) {
|
||||
core::hint::spin_loop();
|
||||
@ -63,7 +63,7 @@ impl Lock {
|
||||
|
||||
match lock_strategy {
|
||||
LockStrategy::Spin => {
|
||||
crate::arch::trap::pop_intr_off();
|
||||
crate::hal::arch::trap::pop_intr_off();
|
||||
}
|
||||
LockStrategy::Sleep => {
|
||||
wakeup(addr_of!(*self).cast_mut().cast());
|
||||
|
@ -1,5 +1,5 @@
|
||||
use crate::{
|
||||
arch::trap::{pop_intr_off, push_intr_off},
|
||||
hal::arch::trap::{pop_intr_off, push_intr_off},
|
||||
proc::{
|
||||
process::{Process, ProcessState},
|
||||
scheduler::sched,
|
||||
|
@ -1,15 +1,17 @@
|
||||
use crate::{
|
||||
arch::{
|
||||
clock::CLOCK_TICKS,
|
||||
power::shutdown,
|
||||
virtual_memory::{copyin, copyinstr},
|
||||
},
|
||||
fs::{
|
||||
file::{self, File},
|
||||
inode::{ilock, iput, iunlock, namei},
|
||||
log::LogOperation,
|
||||
stat::KIND_DIR,
|
||||
},
|
||||
hal::{
|
||||
arch::{
|
||||
clock::CLOCK_TICKS,
|
||||
virtual_memory::{copyin, copyinstr},
|
||||
},
|
||||
platform::shutdown,
|
||||
},
|
||||
println,
|
||||
proc::process::Process,
|
||||
string::strlen,
|
||||
|
Loading…
x
Reference in New Issue
Block a user